Profile of RAISA FABIHA
Academic Information
M.Sc In Electrical and Electronic Engineering (EEE) | Bangladesh University of Engineering and Technology (BUET) | 2019 |
B.Sc.(Hons.) In Electrical and Electronic Engineering (EEE) | Bangladesh University of Engineering and Technology (BUET) | 2016 |
Personal Information
Full Name | RAISA FABIHA |
Email: | raisa.fabiha@primeasia.edu.bd |
Research & Publication
1 | Research Title: Solar Photovoltaic System Design for a Residential Hall in BUET A grid connected solar photovoltaic system has been designed for a residential hall in BUET. Survey results have been used to calculate the load and available rooftop area has been calculated to optimize the system size. An economic analysis is also presented to calculate the payback time and to check the viability of the project. The system can be used to reduce the dependence on grid power. A project like this can also act as a guideline for possible rooftop solar systems in other residential hall in different institutions. |
2 | Research Title: Analytical Modeling and Performance Analysis for Symmetric Double Gate Stack-Oxide Junctionless Field Effect Transistor in Subthreshold Region In this paper, we propose a two-dimensional analytical model of single material symmetric Double Gate Stack-Oxide Junctionless Field Effect Transistor (DGS-JLFET) for subthreshold region. This model has been investigated and expected to improve subthreshold characteristics and minimize short channel effects. The characteristics of DGS-JLFET are compared with those of the single material symmetric Double Gate Junctionless Field Effect Transistor (DG-JLFET). Our proposed DGS-JLFET exhibits higher Ion/Ioff ratio, less subthreshold swing (SS) and less drain induced barrier lowering (DIBL) when compared to DG-JLFET. |
3 | Reseach Title: Effect of Dielectric Constant and Oxide Thickness on the Performance Analysis of Symmetric Double Gate Stack-Oxide Junctionless Field Effect Transistor in Subthreshold Region In this paper, the potential distribution for symmetric double gate stack-oxide junctionless field effect transistor (DGS-JLFET) in subthreshold region has been observed. Using the potential distribution, current vs voltage (Ids vs. Vgs) characteristic and various short channel effects such as on-off ratio (Ion/Ioff), subthreshold swing (SS), drain induced barrier lowering (DIBL), threshold voltage roll-off (TVRO) have been studied by changing device parameters. It has been observed that, if the dielectric constant of high-k oxide is increased and the thickness of stack-oxide is decreased, device shows better short channel effect (SCE) performance in the most of the cases. |
Events & Award
1 | Best Presentation Award Category: Circuits, Device and Photonics Conference: IEEE Region 10 Humanitarian Technology Conference (R10HTC) 2017
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Experience
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Activities
1 | Executive Committee (2019) Member of IEEE Women in Engineering, Bangladesh Section Role: Vice Chair (Activity) Responsibilities: |
2 | United Nations Online Volunteer Role: Proofreader (Calculus) Description: Working as Proofreader (Calculus) under Professional Education, Testing and Certification International Fund (PEOI). PEOI provides complete university level courses online free of charge in twelve languages. Its goal is to help disadvantaged students and aspiring professional to improve their lives and help their country. |
3 | Executive Committee (2018) Member of IEEE Women in Engineering, Bangladesh Section Role: Treasurer Responsibilities: |
4 | Executive Committee (2017) Member of IEEE Women in Engineering, Bangladesh Section Role: Newsletter Editor Responsibilities: |
5 | Student Volunteer in IEEE WIECON-ECE 2015 held on 19-20 December, 2015 held at Bangladesh University of Engineering and Technology (BUET), Dhaka-1000, Bangladesh |